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TEA5640 24121 36MB10B 2SB857 300U1 C1005 1927X25X KA2293
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  holdover Datasheet PDF File

For holdover Found Datasheets File :: 681    Search Time::2.61ms    
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    Zarlink Semiconductor
Part No. ZL30105QDG
OCR Text ...nd a 2 khz multi-frame pulse ? holdover frequency accuracy of 1x10 -8 ? selectable loop filter 1.8 hz, 3.6 hz or 922 hz ? less than 20 ps rms intrinsic jitter on the 19.44 mhz output clock, compliant with gr-253-core oc-3 and g.813 stm-...
Description T1/E1/SDH stratum 3 redundant system clock synchronizer for AdvancedTCA and H.110.

File Size 432.23K  /  50 Page

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    Zarlink Semiconductor
Part No. ZL30102QDG
OCR Text ...tyles of 8 khz framing pulses ? holdover frequency accuracy of 1x10 -7 ? provides lock, holdover and selectable out of range indication ? attenuates wander from 1.8 hz ? less than 0.6 ns pp jitter on all output clocks ? external master cl...
Description T1/E1 stratum 4/4E redundant system clock synchronizer for DS1/E1 and H.110.

File Size 391.50K  /  47 Page

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    Connor-Winfield Corpora...
Part No. SM3-ITG
OCR Text ...available, it will switch to holdover. in the revertive mode the module will seek to acquire the highest priority qualifed reference. in the non-revertive mode the module will not return to the previous reference even after i...
Description ULTRA MINIATURE STRATUM 3 MODULE

File Size 557.86K  /  32 Page

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    PT7A4410 PT7A4410L PT7A4410LJ PT7A4410J

N.A.
ETC
Part No. PT7A4410 PT7A4410L PT7A4410LJ PT7A4410J
OCR Text ...sic jitter, frequency accuracy, holdover accuracy, capture range, phase slope and MTIE, etc. The PT7A4410/4410L operates in Manual or Automatic Mode, and in each of the modes, three operating states are available: Normal, holdover and FreeR...
Description T1/E1/OC3 System Synchronizer

File Size 284.79K  /  34 Page

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    SEMTECH[Semtech Corporation]
Part No. ACS8520
OCR Text ...e supports Free-run, Locked and holdover modes. It also supports all three types of reference clock source: recovered line clock, PDH network, and node synchronization. The ACS8520 generates independent SEC and BITS/SSU clocks, an 8 kHz Fra...
Description Synchronous Equipment Timing Source for Stratum 3/4E/4 and SMC Systems

File Size 1,502.54K  /  150 Page

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    Integrated Device Technology, Inc.
Integrated Circuit Syst...
Part No. IDT82P33731
OCR Text ...ng m odes: free-run, locked and holdover. in free- run mode the dplls synthesize clocks ba sed on the system clock alone. in locked mode the dplls filter reference clock jitter with the selected bandwidth. in locked mode, the long-term o...
Description Synchronous Equipment Timing Source for 10G-40G Synchronous Ethernet
Composite clock inputs

File Size 193.37K  /  12 Page

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    AD9549ABCPZ

Analog Devices
Part No. AD9549ABCPZ
OCR Text ... digitally controlled loop and holdover circuitry, the ad9549 continues to generate a clean (low jitter ), valid output clock during a loss of reference condition, even when both references have failed. the ad9549 operates o ve...
Description Dual Input Network Clock Generator/Synchronizer

File Size 1,085.94K  /  76 Page

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