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Macronix International Co., Ltd.
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| Part No. |
27C4100 27C4096 Mx27C4096 Mx27C4096PI-12 Mx27C4096PI-10 Mx27C4096PI-15 Mx27C4100MC-15 Mx27C4100MI-15 Mx27C4100PI-10
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| Description |
(Mx27C4100 / Mx27C4096) 4M-BIT [512K x 8/256k x 16] CMOS EPROM
4M-BIT [512K x 8/256k x 16] CMOS EPROM 256k x 16 OTPROM, 120 ns, PDIP40
4M-BIT [512K x 8/256k x 16] CMOS EPROM 256k x 16 OTPROM, 100 ns, PDIP40
4M-BIT [512K x 8/256k x 16] CMOS EPROM 256k x 16 OTPROM, 150 ns, PDIP40
4M-BIT [512K x 8/256k x 16] CMOS EPROM 256k x 16 OTPROM, 150 ns, PDSO40
Single Output LDO, 50mA, Fixed(3.0V), Low Quiescent Current, Thermal Protection 5-SOT-23 256k x 16 OTPROM, 100 ns, PDIP40
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| File Size |
769.73K /
18 Page |
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ETC
GSI Technology, Inc.
Electronic Theatre Controls, Inc.
GSI[GSI Technology]
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| Part No. |
GS72108TP-8I GS72108J-10 GS72108J-10I GS72108J-12 GS72108J-12I GS72108J-15 GS72108J-15I GS72108J-8 GS72108J-8I GS72108TP-10 GS72108TP-10I GS72108TP-12 GS72108TP-12I GS72108TP-15 GS72108TP-15I GS72108TP-8 GS72108J-8IT GS72108GP-10I
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| Description |
256k x 8 STANDARD SRAM, 12 ns, PDSO44
256k x 8 STANDARD SRAM, 10 ns, PDSO44
TV 4C 4#12 SKT RECP 256k × 8Mb异步SRAM
256k x 8 2Mb Asynchronous SRAM 256k × 82Mb异步SRAM
TV 15C 14#20 1#16 SKT RECP 256k × 8Mb异步SRAM
256k x 8 STANDARD SRAM, 10 ns, PDSO36 0.400 INCH, SOJ-36
TV 5C 5#16 PIN RECP 256k × 8Mb异步SRAM
256k x 8 STANDARD SRAM, 8 ns, PDSO36 0.400 INCH, SOJ-36
Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVP00; No. of Contacts:37; Connector Shell Size:15; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight 256k × 8Mb异步SRAM
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| File Size |
254.82K /
12 Page |
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it Online |
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
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| Part No. |
M38030F2L-xxxHP M38030F2L-xxxKP M38030F2L-xxxSP M38030F2L-xxxWG M38030MAL-xxxWG M38030MAL-xxxKP M38030FAL-xxxSP M38031FAL-xxxHP M38030FAL-xxxWG M38030MAL-xxxHP M38030FAL-xxxKP M38031FAL-xxxKP M38030FAL-xxxHP M38031FAL-xxxSP M38031FAL-xxxWG M38030MAL-xxxSP M38030F3L-xxxHP M38030F3L-xxxWG M38030M3L-xxxKP M38030F3L-xxxSP M38030F3L-xxxKP M38030M3L-xxxHP M38030FBL-xxxWG M38030MBL-xxxHP M38030FBL-xxxHP M38030FBL-xxxSP M38030MBL-xxxKP M38030M2L-xxxHP M38030M2L-xxxKP M38030M2L-xxxSP M38030M2L-xxxWG M38031F2L-xxxHP M38031F2L-xxxKP M38031F2L-xxxSP M38031F2L-xxxWG M38030FB-xxxHP M38031FBL-xxxSP M38035MBL-xxxSP M38038FBL-xxxSP M38039FBL-xxxSP M38030MBL-xxxSP M38036MBL-xxxSP M38037FBL-xxxSP M38037MBL-xxxSP M38036FBL-xxxSP M38038MBL-xxxSP M38031FC-xxxHP M38031FC-xxxKP M38031FC-xxxWG M38031FCL-xxxHP M38031FCL-xxxKP M38031FCL-xxxSP M38031FCL-xxxWG M38031F5-xxxKP M38031F5-xxxSP M38031F5-xxxWG M38031F5L-xxxHP M38031F5L-xxxKP M38031F5L-xxxSP M38031F5L-xxxWG M38030F1-xxxHP M38030F1-xxxKP M38030F1-xxxSP M38030F1-xxxWG M38030F1L-xxxHP M38030F1L-xxxKP M38030F1L-xxxSP M38030F1L-xxxWG M38031F1-xxxKP M38031F1-xxxWG M38031F1L-xxxHP M38031F1L-xxxKP M38031F6-xxxHP M38031F6-xxxKP M38031F6-xxxSP M38031F6-xxxWG M
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| Description |
256 Kbit (32K x 8) nvSRAM; Organization: 32Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 256 Kb; Package: SOIC
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C
256k (32K x 8) Static RAM; Density: 256 Kb; Organization: 32Kb x 8; Vcc (V): 4.50 to 5.50 V;
Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 1 MHz to 200 MHz; Outputs: 6
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 256; Vcc (V): 3.3; fMax (MHz): 66; tPD (ns): 12
8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V;
9-Mbit (256k x 36/512K x 18) pipelined SRAM; Architecture: Standard Sync, pipeline SCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
9-Mbit (256k x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
18-Mbit QDR(TM)-II SRAM 4-Word burst Architecture; Architecture: QDR-II, 4 Word burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V
Four Output PCI-x and General Purpose Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 140 MHz; Outputs: 4; Operating Range: 0 to 70 C
18-Mbit QDR(TM)-II SRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V
9-Mbit (256k x 36/512K x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 2.4 to 2.6 V
4-Mbit (512K x 8) Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.50 to 5.50 V;
4-Mbit (256k x 16) Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 2.20 to 3.60 V;
64K x 16 Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V;
1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 4.5 to 5.5 V;
9-Mbit (256k x 36/512K x 18) pipelined SRAM; Architecture: Standard Sync, pipeline SCD; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V
1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V;
4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 512Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP
4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 256kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP
16-Mbit (1M x 16 / 2M x 8) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 4.50 to 5.50 V;
4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY; Density: 128 Kb; Organization: 8Kb x 16; Vcc (V): 4.5 to 5.5 V; Speed: 35 ns
9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V
9-Mbit (256k x 36/512K x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V
9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 2.4 to 2.6 V
9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 4.50 to 5.50 V;
9-Mbit (256k x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V
256k x 16 Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 4.5 to 5.5 V;
9-Mbit (256k x 36/512K x 18) pipelined DCD Sync SRAM; Architecture: Standard Sync, pipeline DCD; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V
4-Mbit (256k x 16) Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 3.0 to 3.6 V;
8-Mbit (1024K x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V;
18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
256k x 16 Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 3.0 to 3.6 V;
8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V;
3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: -40 to 85 C
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
512K x 8 Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.5 to 5.5 V;
18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 2.4 to 2.6 V
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C
2M x 8 Static RAM; Density: 16 Mb; Organization: 2Mb x 8; Vcc (V): 3.0 to 3.6 V;
16 Mbit (512K x 32) Static RAM; Density: 16 Mb; Organization: 512Kb x 32; Vcc (V): 3.0 to 3.6 V;
3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: 0 to 70 C
8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 3.0 to 3.6 V;
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V;
16-Mbit (1M x 16) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V;
4-Mbit (256k x 18) pipelined DCD Sync SRAM; Architecture: Standard Sync, pipeline DCD; Density: 4 Mb; Organization: 256kb x 18; Vcc (V): 3.1 to 3.6 V
512K (32K x 16) Static RAM; Density: 512 Kb; Organization: 32Kb x 16; Vcc (V): 3.0 to 3.6 V;
4-Mbit (128K x 36) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, pipeline; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
1M x 16 Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V;
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C
MoBL(R) 2 Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V;
Rambus(R) xDR(TM) Clock Generator; VDD: 2.5 V; Input Frequency: 100 MHz to 133 MHz; Output Frequency: 300 MHz to 800 MHz; # Out: 4
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V;
4-Mbit (128K x 36) pipelined Sync SRAM; Architecture: Standard Sync, pipeline SCD; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 167; tPD (ns): 7
2.5V or 3.3V, 200-MHz, 1:10 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 10; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 100; tPD (ns): 7
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 7
18-Mbit DDR-II SRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V
Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 25 MHz to 100 MHz; Output Frequency Range: 25 MHz to 100 MHz; Operating Range: 0 to 70 C; Package: SOIC
Low Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 143; tPD (ns): 9 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 154; tPD (ns): 6 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 3.3; fMax (MHz): 83; tPD (ns): 10 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6 单芯位CMOS微机
Three-PLL General-Purpose EPROM Programmable Clock Generator; Voltage (V): 3.3/5.0 V; Input Range: 1 MHz to 30 MHz; Output Range: .077 MHz to 100 MHz; Outputs: 6 单芯位CMOS微机
8-Mbit (512K x 16) MoBL(R) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 100 MHz; Outputs: 10; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: -40 to 85 C 单芯位CMOS微机
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 单芯位CMOS微机
MoBL(R) 1 Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
18-Mbit QDR(TM)-II SRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
1-Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 4.50 to 5.50 V; 单芯位CMOS微机
4-Mbit (256k x 18) pipelined Sync SRAM; Architecture: Standard Sync, pipeline SCD; Density: 4 Mb; Organization: 256kb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
2-Mbit (64K x 32) pipelined Sync SRAM; Architecture: Standard Sync, pipeline SCD; Density: 2 Mb; Organization: 64Kb x 32; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
200-MHz Field Programmable Zero Delay Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 10 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C 单芯位CMOS微机
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
2-Mbit (256k x 8) Static RAM; Density: 2 Mb; Organization: 256kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯8位CMOS微机
Very Low Jitter Field and Factory Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 10 MHz to 133 MHz; Output Range: 20 MHz to 200 MHz; Outputs: 2 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 单芯位CMOS微机
Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 0 MHz to 200 MHz; Outputs: 3 单芯位CMOS微机
1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机
Quad PLL Clock Generator with 2-Wire Serial Interface; Voltage (V): 2.5/3.3 V; Input Range: 27 MHz to 27 MHz; Output Range: 4.2 MHz to 166 MHz; Outputs: 5 单芯位CMOS微机
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C 单芯位CMOS微机
High Speed Multi-phase PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 24 MHz to 200 MHz; Outputs: 11; Operating Range: 0 to 70 C 单芯位CMOS微机
2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 18; Operating Range: -40 to 85 C 单芯位CMOS微机
-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 位AVR微控制器具有8K字节的系统内可编程闪
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C
1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: 0 to 70 C
Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 4 MHz to 32 MHz; Output Frequency Range: 4 MHz to 32 MHz; Operating Range: 0 to 70 C; Package: SOIC
High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9
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| File Size |
1,602.57K /
119 Page |
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Alliance Semiconductor, Corp.
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| Part No. |
AS7C33512PFS16A
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| Description |
3.3V 512K x 16/18 pipeline burst synchronous SRAM
3.3V 512K×16 pipeline burst Synchronous SRAM(3.3V 512K×16流水线脉冲同步静态RAM) 3.312k × 16管道爆裂同步SRAM的电压（3.3V12k × 16流水线脉冲同步静态内存）
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| File Size |
211.29K /
11 Page |
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it Online |
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Price and Availability
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