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  two-bank Datasheet PDF File

For two-bank Found Datasheets File :: 8321    Search Time::1.171ms    
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    NXP
Part No. LPC1853JET256 LPC1857FET256 LPC1833JET256 LPC184X
OCR Text ...gurable timer (sct) subsystem, two high-speed usb controllers, ethernet, lcd, an external memory controller, and multiple digital and anal...bank flash memory with flash accelerator. ? 16 kb on-chip eeprom data memory. ? 136 kb sram for code...
Description (LPC181x/2x/3x/4x/5x) 32-bit ARM Cortex-M3 MCU

File Size 2,730.20K  /  147 Page

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Part No. K8D1716UBC-PC070
OCR Text ...8d1716u nor flash consists of two banks. this device is capable of reading data from one bank while programming or erasing in the other bank. access times of 70ns, 80ns and 90ns are available for the device. the device s fast access time...
Description 1M X 16 FLASH 2.7V PROM, 70 ns, PDSO48

File Size 565.81K  /  41 Page

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    EM78P447 EM78P447S EM78P447SA EM78P447SB

ELAN Microelectronics Corp
Part No. EM78P447 EM78P447S EM78P447SA EM78P447SB
OCR Text ...pt Power-down mode (SLEEP mode) Two available interruptions * TCC overflow interrupt * External interrupt(INT pin) Programmable free running...bank 0 ~ 4. See the configuration of the data memory in Fig. 4. 6. R5 ~ R7 (Port 5 ~ Port 7) *...
Description 8-bit microprocessor with low-power and high-speed CMOS technology

File Size 132.78K  /  27 Page

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    EM78P458 EM78P459 EM78P458AM EM78P459AM EM78P459AK EM78P458AP

ELAN Microelectronics Corp
EMC
Part No. EM78P458 EM78P459 EM78P458AM EM78P459AM EM78P459AK EM78P458AP
OCR Text ...rogrammable open-drain I/O pins Two clocks per instruction cycle 99.9% single instruction cycle commands Package type : * 20-pin DIP 300 mil...bank 0 or bank 1. Bit 7 is a general-purpose read/write bit. See the configuration of the data memor...
Description 8-bit microprocessors with low-power and high-speed CMOS technology

File Size 258.12K  /  44 Page

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    SILICON STORAGE TECHNOLOGY INC
Part No. SST34HF3242C-70-4E-L1PE
OCR Text ...ncurrent operations between the two flash memory banks and the (p)sram. the devices can read data from either bank while an erase or program operation is in progress in the opposite bank. the two flash memory banks are partitioned into 4 mb...
Description SPECIALTY MEMORY CIRCUIT, PBGA56

File Size 504.74K  /  40 Page

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    Samsung Electronic
Part No. KS57P01504
OCR Text ...in arbitrary format interrupts two external interrupt vectors three internal interrupt vectors two quasi-interrupts memory-mapped i/o structure data memory bank 15 two power-down modes idle mode: only cpu clock stops stop mode: system...
Description Single-Chip CMOS Microcontroller

File Size 344.38K  /  36 Page

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    ICS9112M-06 ICS9112M-07 ICS9112-06

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
HIROSE ELECTRIC Co., Ltd.
Part No. ICS9112M-06 ICS9112M-07 ICS9112-06
OCR Text ...ffer. The ICS9112 comes in with two different options; dash 06 and dash 07. The dash 07 is available in a 16 pin 150 mil SOIC package. It ha...bank B or both banks can be put in a tri-state mode. In this mode, the PLL is still running and only...
Description Low Skew Output Buffer
Composite Camera Cable; Number of Conductors:7; Conductor Size AWG:22; No. Strands x Strand Size:7 x 30; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:3; Coaxial RG/U Type:59; Conductor Material:Copper RoHS Compliant: Yes 低偏移输出缓

File Size 202.83K  /  8 Page

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    ICS843242AG ICS843242AGLF ICS843242AGLFT

Integrated Device Technology
Part No. ICS843242AG ICS843242AGLF ICS843242AGLFT
OCR Text ...MHz, and 125MHz. FEATURES * Two 3.3V differential LVPECL output pairs * Using a 31.25MHz or 26.041666 crystal, the two output banks can ...Bank B. Default = High. Pullup LVCMOS/LVTTL interface levels. Division select pin for Bank B. Defaul...
Description FEMTOCLOCKS⑩ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

File Size 270.85K  /  16 Page

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    HYS72T64001HP

Qimonda AG
Part No. HYS72T64001HP
OCR Text ...rank in 32m 72, 64m x 72 and two rank in 64m 72 module organization and 32m 8, 64m 4 chip organization ? 256m, 512 mbyte modules...bank/columns bits raw card 256 mb 32m 72 1 ecc 9 13/2/10 f 512 mb 64m 72 1 ecc 18 13/2/11 h 512 mb...
Description 240-Pin Registered DDR2 SDRAM Modules

File Size 1,025.25K  /  53 Page

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    NANYA TECHNOLOGY CORP
Part No. NT5DS128M4BT-6K
OCR Text ... double data rate architecture: two data transfers per clock cycle ? bidirectional data strobe (dqs) is transmitted and received with data...bank dram. the 512mb ddr sdram uses a double-data-rate architec- ture to achieve high-speed operati...
Description 128M X 4 DDR DRAM, 0.7 ns, PDSO66

File Size 2,500.58K  /  80 Page

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