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MICREL[Micrel Semiconductor]
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| Part No. |
SY89542UMITR SY89542U SY89542UMG SY89542UMGTR SY89542UMI
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| OCR Text |
...ifferential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC- or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50. Note that these inputs will ... |
| Description |
2.5Vm 3.2Gbps DUAL, DIFFERENTIAL 2:1 LVDS MULTIPLEXER WITH INTERNAL TERMINATION
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| File Size |
146.76K /
9 Page |
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EXAR[Exar Corporation]
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| Part No. |
XRK4991AIJ-7 XRK4991A XRK4991ACJ-5 XRK4991ACJ-7 XRK4991AIJ-5
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| OCR Text |
...idual drivers, arranged as four pairs of user-controllable outputs, can each drive terminated transmission lines with impedances as low as 50 while delivering minimal and specified output skews and full-swing logic levels (LVTTL). Each outp... |
| Description |
3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
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| File Size |
242.13K /
13 Page |
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it Online |
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EXAR[Exar Corporation]
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| Part No. |
XRK7933
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| OCR Text |
...lock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other three pairs generate 3x, phase aligned clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The XR... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
144.03K /
10 Page |
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it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK7955
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| OCR Text |
...lock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other three pairs generate 5x, phase aligned clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The XR... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
144.74K /
10 Page |
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it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK7988
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| OCR Text |
...lock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other three pairs generate 8x, phase aligned clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The XR... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
143.40K /
10 Page |
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it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK79892IQ XRK79892
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| OCR Text |
...lock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other three pairs generate 4x, phase aligned clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The XR... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
188.14K /
10 Page |
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it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK799J93IQ XRK799J93
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| OCR Text |
...lock outputs. Two of the output pairs regenerate the input signals frequency and phase while the other three pairs generate 2x, phase aligned clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The XR... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
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| File Size |
64.53K /
10 Page |
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it Online |
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MACOM[Tyco Electronics]
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| Part No. |
MA4ST250 MA4ST200 MA4ST200_1 MA4ST230 MA4ST240 MA4ST2001
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| OCR Text |
...le as Single and Common Cathode pairs Tape and Reel Packaging Designed for Commercial Wireless Applications Lead-Free (RoHS Compliant) equivalents available with 260C reflow compatibility
Description
M/A-COM's MA4ST200 series is a ion-i... |
| Description |
Low-Voltage / High Q Si Hyperabrupt Varactors
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| File Size |
115.58K /
5 Page |
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it Online |
Download Datasheet |
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Price and Availability
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