lvpecl lvds cmos pdf Datasheet P2 Full Text Search --- IC-ON-LINE


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lvpecl lvds cmos Datasheet PDF File

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				Silicon Laboratories
Part No.	SI53307
OCR Text	...in selectable output formats: lvpecl, low power lvpecl, lvds, cml, hcsl, lvcmos ? synchronous output enable ? 2:1 input mux with glitchless input clock switching ? independent v dd and v ddo : 1.8/2.5/3.3 v ? small size: 16-qfn (3 mm...
Description	2:2 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR
File Size	1,492.81K / 30 Page	View it Online	Download Datasheet

				Silicon Laboratories
Part No.	SI53304
OCR Text	...pin selectable output formats: lvpecl, low power lvpecl, lvds, cml, hcsl, lvcmos ? 2:1 mux with hot-swappable inputs ? glitchless input clock switching ? synchronous output enable ? individual output enable ? independent v dd and v ddo...
Description	1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX AND INDIVIDUAL OE
File Size	1,871.94K / 33 Page	View it Online	Download Datasheet

				Silicon Laboratories
Part No.	SI53303
OCR Text	...in selectable output formats: lvpecl, low power lvpecl, lvds, cml, hcsl, lvcmos ? synchronous output enable ? output clock division: /1, /2, /4 ? low output-output skew: <50 ps ? low propagation delay variation: <400 ps ? independen...
Description	DUAL 1:5 LOW JITTER BUFFER/LEVEL TRANSLATOR
File Size	1,626.36K / 30 Page	View it Online	Download Datasheet

				ATMEL Corporation
Part No.	ATC18RHA
OCR Text	...nd Receiver differential pads * lvpecl Receiver differential pads Standard pads Input level compatibility * IO18: cmos * IO33: cmos,LVTTL co...lvds,lvpecl excepted) are tolerant. This means that when * the pad is configured as an input * VCCB ...
Description	Rad. Hard 0.18 Um cmos Cell-based ASIC for Space Use
File Size	217.03K / 19 Page	View it Online	Download Datasheet

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