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Integrated Device Techn...
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| Part No. |
82P33814ANLG8 82P33814ANLG/W
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| OCR Text |
...ating m odes: free-run, locked, holdover and dco. in free-run mode the dplls synthesize clocks based on the system clock alone. in locked mode the dplls filter reference clock jitter with t he selected bandwidth. in locked mode, the lon... |
| Description |
Synchronization Management Unit for IEEE 1588 and Synchronous Ethernet
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| File Size |
344.74K /
13 Page |
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it Online |
Download Datasheet
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Integrated Device Techn...
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| Part No. |
82P33810ABAG8
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| OCR Text |
...ating m odes: free-run, locked, holdover and dco. in free-run mode the dplls synthesize clocks based on the system clock alone. in locked mode the dplls filter reference clock jitter with t he selected bandwidth. in locked mode, the lon... |
| Description |
Synchronization Management Unit for IEEE 1588 and Synchronous Ethernet
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| File Size |
279.59K /
13 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
82P33724
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| OCR Text |
...ng m odes: free-run, locked and holdover. in free- run mode the dplls synthesize clocks ba sed on the system clock alone. in locked mode the dplls filter reference clock jitter with the selected bandwidth. in locked mode, the long-term o... |
| Description |
Port Synchronizer for IEEE 1588 and Synchronous Ethernet
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| File Size |
232.45K /
13 Page |
View
it Online |
Download Datasheet |
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MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
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| Part No. |
MAX3874EVKIT MAX3872 MAX3872EVKIT MAX3874 MAX3872EVKIT-MAX3874EVKIT
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| OCR Text |
...mal, system loopback, and clock holdover. The three operational modes are programmed by connecting the appropriate pins of JU13 (SIS) and JU14 (LREF). See Table 1. Normal operation mode requires a serial data stream at the SDI inputs, syste... |
| Description |
Evaluation Kits for the MAX3872/MAX3874
MAX3872/MAX3874 Evaluation Kits
From old datasheet system
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| File Size |
199.83K /
8 Page |
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it Online |
Download Datasheet |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
MT90401AB1 MT90401 MT90401AB
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| OCR Text |
...kHz input reference frequencies holdover accuracy of 0.02 ppm Adjustable output clock phase supporting masterslave arrangements Hardware or microprocessor control (8 bit microprocessor interface) 3.3 V supply JTAG boundary scan Ordering Inf... |
| Description |
SONET/SDH System Synchronizer
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| File Size |
629.61K /
38 Page |
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it Online |
Download Datasheet |
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Price and Availability
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