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NS
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| Part No. |
DS90C385AM
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| OCR Text |
...ata into four LVDS (Low Voltage differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data...lvcmos/LVTTL DC SPECIFICATIONS
1
10
TRANSMITTER SUPPLY CURRENT ICCTW Transmitter Supply Cur... |
| Description |
3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display Link-87.5 MHz
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| File Size |
628.65K /
14 Page |
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it Online |
Download Datasheet
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Silego
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| Part No. |
SLGSSTVF16859H
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| OCR Text |
...with JEDEC standard SSTV16859 * differential Clock inputs * SSTL_2 data input signaling * Supports SSTL_2 class I output specifications * Ou...lvcmos input levels on RESET pin * 2.3V-2.7V Operation for PC1600/2100/2700 * 2.5V-2.7V Operation fo... |
| Description |
DDR 13 to 26 Bit Registered Buffer
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| File Size |
331.29K /
11 Page |
View
it Online |
Download Datasheet
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