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Atmel Corp.
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| Part No. |
AT28C256NBSP AT28C256
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| OCR Text |
...xceeded the AT28C256 will cease accepting data and commence the internal programming operation. All bytes during a page write operation must reside on the same page as defined by the state of the A6 - A14 inputs. For each WE high to low tra... |
| Description |
32K*8 Paged Parallel EEPROM(32K*8页面存取模式并行EEPROM)
From old datasheet system
256K EEPROM with 64-Byte Page & Software Protection
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| File Size |
353.60K /
18 Page |
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it Online |
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Zarlink
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| Part No. |
NJ8820 230
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| OCR Text |
...control and latch circuitry for accepting and latching the input data. Data is presented as eight 4-bit words read from an external memory, with the necessary timing signals generated internally. It is intended to be used in conjunction wit... |
| Description |
FREQUENCY SYNTHESISER (PROM INTERFACE)
From old datasheet system
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| File Size |
340.71K /
10 Page |
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it Online |
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IDT
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| Part No. |
IDT79RV3081E IDT79RV3081 IDT79R3081E IDT79R3081 79R3081_DS_15214
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| OCR Text |
...tem and software set capable of accepting a wide variety of CPUs, according to the price/performance goals of the end system. In addition to the embedded applications served by the R3051 family, the R3081 allows low-cost, entry level comput... |
| Description |
Floating-Point Capable 32-bit Embedded Processor. **NOT RECOMMENDED FOR NEW DESIGNS**
From old datasheet system
RISController?
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| File Size |
551.14K /
41 Page |
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it Online |
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Zarlink
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| Part No. |
SP5659 308
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| OCR Text |
...o the read mode, the controller accepting the data must pull the SDA line low during all status byte acknowledge periods to read another status byte. If the controller fails to pull the SDA line low during this period, the device generates ... |
| Description |
2・7GHz I2C Bus Low Phase Noise Synthesiser
From old datasheet system
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| File Size |
244.35K /
13 Page |
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it Online |
Download Datasheet |
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Zarlink
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| Part No. |
SP5611 304
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| OCR Text |
...o the read mode, the controller accepting the data must pull the SDA line low during all status byte acknowledge periods to read another status byte. If the controller fails to pull the SDA line low during this period, the device generates ... |
| Description |
1・3GHz Bidirectional I2C Bus Controlled Synthesiser
From old datasheet system
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| File Size |
494.60K /
12 Page |
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it Online |
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