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  sts-192 Datasheet PDF File

For sts-192 Found Datasheets File :: 177    Search Time::1.093ms    
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    Zarlink Semiconductor Inc.
Part No. MT9046 MT9046AN
OCR Text ...2, c4 , c6, c8, c16 , and c19 (sts-3/oc3 clock divided by 8) output clock signals ? provides 5 styles of 8 khz framing pulses ? holdover f...192 mb/s (cmos output). this is an 8 khz 61 ns active low framing pulse, which marks the beginning...
Description T1/E1 System Synchronizer with Holdover

File Size 307.19K  /  34 Page

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    Applied Micro Circuits, Corp.
Part No. CS19227PBI-2
OCR Text ... groomed through a traditional sts-based sonet/sdh switch that perhaps exists within an otn cloud. either of the previously described flow control methods can be employed in this mapping mode. a fifth manner of 10ge-lan mapping is supp...
Description 10GE & OC192/48/12/3 DW/FEC/PM and AsyncMap Device with Strong FEC 万兆以太

File Size 292.89K  /  5 Page

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    ORLI10G ORLI10G-1BM680C ORLI10G-1BM680I ORLI10G-1BMN680C ORLI10G-1BMN680I ORLI10G-2BM680C ORLI10G-2BMN680C ORLI10G-2BMN6

Lattice Semiconductor
Part No. ORLI10G ORLI10G-1BM680C ORLI10G-1BM680I ORLI10G-1BMN680C ORLI10G-1BMN680I ORLI10G-2BM680C ORLI10G-2BMN680C ORLI10G-2BMN680I ORLI10G-3BM680C ORLI10G-3BMN680C
OCR Text ...the ORLI10G can divide down the sts-192/STM-64 SONET/SDH data line rate of 622 MHz by 4 to synchronize with a 155 MHz system clock, or the 12.5 Gbits/s Super-FEC data line rate of 781 MHz can be divided by 8 MHz to 98 MHz system clock or by...
Description Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC

File Size 424.40K  /  80 Page

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    IA8344-PDW40I-00 IA8344-PLC44I-00 IA8044-PLC44I-00 IA8X44 IA8044 IA8044-PDW40I-00 IA804401

InnovASIC, Inc
Part No. IA8344-PDW40I-00 IA8344-PLC44I-00 IA8044-PLC44I-00 IA8X44 IA8044 IA8044-PDW40I-00 IA804401
OCR Text ...80h Register B ACC NSNR PSW STS IP P3 IE P2 P1 TCON P0 Internal RAM Bit Addressable Locations Byte Address 30h-BFh 2Fh 2Eh 2Dh 2Ch 2...192 byte internal RAM in blocks referred to as the transmit and receive buffers. The SIU can support...
Description SDLC COMMUNICATIONS CONTROLLER

File Size 141.14K  /  32 Page

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    SLE66CLX641P

INFINEON[Infineon Technologies AG]
Part No. SLE66CLX641P
OCR Text ...y certified Self Test Software (STS) Certified EEPROM programming routines (RMS_E) True Random Number Generator with Firmware test function ...192 bit Elliptic Curves GF(2n) EC-DSA Signature Verify 192 bit Table 3 Type Ordering Informati...
Description Security & Chip Card ICs

File Size 141.56K  /  11 Page

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    ORLI10G-2BM680I ORLI10G-3BMN680C ORLI10G-1BM680I ORLI10G-1BMN680C ORLI10G-1BMN680I ORLI10G-2BMN680C ORLI10G-2BM680C ORLI

Lattice Semiconductor, Corp.
Lattice Semiconductor Corporation
http://
Part No. ORLI10G-2BM680I ORLI10G-3BMN680C ORLI10G-1BM680I ORLI10G-1BMN680C ORLI10G-1BMN680I ORLI10G-2BMN680C ORLI10G-2BM680C ORLI10G-1BM680C ORLI10G-2BMN680I ORLI10G-3BM680C
OCR Text ...the ORLI10G can divide down the sts-192/STM-64 SONET/SDH data line rate of 622 MHz by 4 to synchronize with a 155 MHz system clock, or the 12.5 Gbits/s Super-FEC data line rate of 781 MHz can be divided by 8 MHz to 98 MHz system clock or by...
Description FPGA, PBGA680 LEAD FREE, PLASTIC, FPBGA-680
FPGA, PBGA680 PLASTIC, FPBGA-680
FPGA, 1296 CLBS, 380000 GATES, PBGA680 PLASTIC, MULTILAYER, BGA-680
Quad 2.5Gbps, 10Gbps Quad 3.125Gbps, 12.5Gbps Line Interface FPSC

File Size 440.07K  /  80 Page

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    INFINEON[Infineon Technologies AG]
Part No. SLE66CLX640P-C SLE66CLX640P SLE66CLX640P-M84
OCR Text ...y certified Self Test Software (STS) Certified EEPROM programming routines (RMS_E) True Random Number Generator with Firmware test function ...192 bit Elliptic Curves GF(2n) EC-DSA Signature Verify 192 bit Table 3 Type Ordering Informati...
Description Security & Chip Card ICs 安全
Security & Chip Card ICs

File Size 174.83K  /  12 Page

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    IA8344 IA8044 IA8344-PLC44I-01 IA8044-PDW40I-01 IA8044-PLC44I-01 IA8344-PDW40I-01

INNOVASIC[InnovASIC, Inc]
Part No. IA8344 IA8044 IA8344-PLC44I-01 IA8044-PDW40I-01 IA8044-PLC44I-01 IA8344-PDW40I-01
OCR Text ...80h Register B ACC NSNR PSW STS IP P3 IE P2 P1 TCON P0 Internal RAM Bit Addressable Locations Byte Address 30h-BFh 2Fh 2Eh 2Dh 2Ch 2...192 byte internal RAM in blocks referred to as the transmit and receive buffers. The SIU can support...
Description From old datasheet system
SDLC COMMUNICATIONS CONTROLLER

File Size 216.63K  /  49 Page

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    Zarlink
Part No. MT9046
OCR Text ..., C2, C4, C6, C8, C16, and C19 (STS-3/OC3 clock divided by 8) output clock signals Provides 5 styles of 8 KHz framing pulses Holdover freque...192 Mb/s (CMOS Output). This is an 8kHz 61ns active low framing pulse, which marks the beginning of ...
Description T1/E1 System Synchronizer with Holdover

File Size 430.33K  /  34 Page

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    CS19227PBI-2

Applied Micro Circuits Corporation
Part No. CS19227PBI-2
OCR Text ...e groomed through a traditional STS-based SONET/SDH switch that perhaps exists within an OTN cloud. Either of the previously described flow ...192/STM 64 1 x O TU2 10.7G H z D ispersionXX-2 C hipset 4 Empowering Intelligent Optical...
Description 10GE & OC192/48/12/3 DW/FEC/PM and AsyncMap Device with Strong FEC

File Size 300.37K  /  5 Page

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For sts-192 Found Datasheets File :: 177    Search Time::1.093ms    
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