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  holdover. Datasheet PDF File

For holdover. Found Datasheets File :: 609    Search Time::1.328ms    
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    MT9044AL MT9044AP MT9044

MITEL[Mitel Networks Corporation]
Part No. MT9044AL MT9044AP MT9044
OCR Text ... styles of 8 KHz framing pulses Holdover frequency accuracy of 0.05 PPM Holdover indication Attenuates wander from 1.9Hz Provides Time Interval Error (TIE) correction Accepts reference inputs from two independent sources JTAG Boundary Scan ...
Description T1/E1/OC3 System Synchronizer

File Size 119.91K  /  30 Page

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    SY01-S3F

Raltron Electronics Corporation
Part No. SY01-S3F
OCR Text ...rence 1, Locked to Reference 2, Holdover and Free-run. Accepts reference inputs from two independent sources from 8 kHz to 77.76 MHz. Provides two outputs up to 77.76 MHz. Provides a secondary free-run output within +/-4.6PPM Loop filtering...
Description SYNCHRONOUS EQUIPMENT OCXO BASED STRATUM 3 CLOCK UNIT WITH A 2ND FREE-RUN CLOCK OUTPUT

File Size 161.44K  /  6 Page

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    SY01-S3

Raltron Electronics Corporation
Part No. SY01-S3
OCR Text ...rence 1, Locked to Reference 2, Holdover and Free-run. Accepts reference inputs from two independent sources from 8 kHz to 77.76 MHz. Provides two outputs up to 77.76 MHz. Loop filtering utilizing application specific software in the digita...
Description SYNCHRONOUS EQUIPMENT OCXO BASED STRATUM 3 CLOCK UNIT

File Size 163.02K  /  6 Page

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    ZL30402QCG1 ZL30402_06 ZL30402 ZL30402_QCC

ZARLINK[Zarlink Semiconductor Inc]
Part No. ZL30402QCG1 ZL30402_06 ZL30402 ZL30402_QCC
OCR Text ...E1, E2, E3, STM-1 and 19.44 MHz Holdover accuracy to 1x10 meets GR-1244 Stratum 3E and ITU-T G.812 requirements Continuously monitors Primary and Secondary reference clocks Provides "hit-less" reference switching Compensates for Master Cloc...
Description SONET/SDH Network Element PLL

File Size 447.96K  /  44 Page

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    ZL30407QCG1 ZL30410 ZL30407 ZL30407_06 ZL30407QCC

ZARLINK[Zarlink Semiconductor Inc]
Part No. ZL30407QCG1 ZL30410 ZL30407 ZL30407_06 ZL30407QCC
OCR Text ...-3, E1, E3, STM-1 and 19.44 MHz Holdover accuracy of 4x10 -12 meets GR-1244 Stratum 3E and ITU-T G.812 requirements Continuously monitors both references for frequency accuracy exceeding 12 ppm Provides "hit-less" reference switching Compen...
Description SONET/SDH Network Element PLL

File Size 578.09K  /  57 Page

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    ZL50018GAG2 ZL50018_06 ZL50018 ZL50018GAC ZL50018QCC ZL50018QCG1

ZARLINK[Zarlink Semiconductor Inc]
Part No. ZL50018GAG2 ZL50018_06 ZL50018 ZL50018GAC ZL50018QCC ZL50018QCG1
OCR Text ...1.544 MHz output) DPLL provides holdover, freerun and jitter attenuation features with four independent reference source inputs Programmable key DPLL parameters (filter corner frequency, locking range, auto-holdover * * November 2006 * ...
Description 2 K Digital Switch with Enhanced Stratum 3 DPLL

File Size 944.06K  /  136 Page

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    ZL50030GAC ZL50030

ZARLINK[Zarlink Semiconductor Inc]
Part No. ZL50030GAC ZL50030
OCR Text ...Enhanced switching standard * * Holdover Mode with holdover frequency stability of 0.07 ppm Jitter attenuation from 1.52 Hz. Time interval error (TIE) correction Master and Slave mode operation * Ordering Information ZL50030GAC 220 Ball - P...
Description Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch

File Size 645.77K  /  73 Page

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    AD9516-0_PCBZ AD9516-0BCPZ AD9516-0BCPZ-REEL7 AD9516-007 AD9516-0

AD[Analog Devices]
Part No. AD9516-0_PCBZ AD9516-0BCPZ AD9516-0BCPZ-REEL7 AD9516-007 AD9516-0
OCR Text ...and manual reference switchover/holdover modes Autorecover from holdover Accepts references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each pair shares 1 to 32 d...
Description 14-Output Clock Generator with Integrated 2.8 GHz VCO

File Size 1,021.74K  /  84 Page

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    AD9516-1 AD9516-1_PCBZ AD9516-1BCPZ AD9516-1BCPZ-REEL7

Analog Devices
Part No. AD9516-1 AD9516-1_PCBZ AD9516-1BCPZ AD9516-1BCPZ-REEL7
OCR Text ...and manual reference switchover/holdover modes Autorecover from holdover Accepts references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each pair shares 1 to 32 d...
Description 14-Output Clock Generator with Integrated 2.5 GHz VCO

File Size 1,009.67K  /  84 Page

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    AD9516-2 AD9516-2_PCBZ AD9516-2BCPZ AD9516-2BCPZ-REEL7

Analog Devices
Part No. AD9516-2 AD9516-2_PCBZ AD9516-2BCPZ AD9516-2BCPZ-REEL7
OCR Text ...and manual reference switchover/holdover modes Autorecover from holdover Accepts references to 250 MHz Programmable delays in path to PFD Digital or analog lock detect, selectable 3 pairs of 1.6 GHz LVPECL outputs Each pair shares 1 to 32 d...
Description 14-Output Clock Generator with Integrated 2.2 GHz VCO

File Size 922.17K  /  84 Page

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For holdover. Found Datasheets File :: 609    Search Time::1.328ms    
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