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differential-to-hstl Datasheet PDF File

For differential-to-hstl Found Datasheets File :: 922 Search Time::4ms
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				Motorola
Part No.	MCM63R736
OCR Text	...ate copper CMOS technology. The differential clock (CK) inputs control the timing of read/write operations of the RAM. At the rising edge of...to accept write data on the rising edge of CK, a cycle after address and control signals. Read data ...
Description	4M Late Write HSTL From old datasheet system
File Size	140.09K / 21 Page	View it Online	Download Datasheet

				FREESCALE[Freescale Semiconductor, Inc]
Part No.	MCM63R836FC3.0 MCM63R836FC3.3 MCM63R836FC3.7 MCM63R836FC4.0 MCM63R918 MCM63R918FC4.0R MCM63R836 MCM63R836FC3.0R MCM63R836FC3.3R MCM63R836FC3.7R MCM63R836FC4.0R MCM63R918FC3.0 MCM63R918FC3.0R MCM63R918FC3.3 MCM63R918FC3.3R MCM63R918FC3.7 MCM63R918FC3.7R MCM63R918FC4.0
OCR Text	...licon gate CMOS technology. The differential clock (CK) inputs control the timing of read/write operations of the RAM. At the rising edge of...to accept write data on the rising edge of CK, a cycle after address and control signals. Read data ...
Description	MCM63R836
File Size	342.87K / 21 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89538L SY89538LHGTR SY89538LHG
OCR Text	... output frequency banks: - Four differential LVPECL output banks - One differential LVDS output bank with three output pairs * Output bank s...to +85C) * Available in a 64-pin EPAD-TQFP Five-independently programmable output banks This leve...
Description	3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer with Zero Delay
File Size	625.66K / 23 Page	View it Online	Download Datasheet

				ATMEL[ATMEL Corporation]
Part No.	TS8308500 TS8308500CGL TS8308500VGL TSX8308500GL TSEV8308500GLZA2 TSEV8308500GL
OCR Text	Differential or Single-ended Analog Inputs Differential or Single-ended 50 ECL Compatible Clock Inputs ECL or LVDS/HSTL Output Compatibility...to 500 MHz * SINAD = 45 dB (7.2 Effective Bits), SFDR = 54 dBc at FS = 500 Msps, FIN = 20 MHz * ...
Description	ADC 8-BIT 500 MSPS
File Size	486.79K / 50 Page	View it Online	Download Datasheet

				XILINX[Xilinx, Inc]
Part No.	XC3S400 XC3S1000-4FG1156C XC3S1000-4FG676I XC3S1000-4VQ100C XC3S1000-4VQ100I XC3S1000-5FG1156C XC3S1000-5FG456C XC3S1000-5FG676C XC3S1000-5FG676I XC3S1000-5FG900C XC3S200-4TQ144I XC3S400-5PQ208C XC3S1000-4FG320I XC3S1000-4FG456I XC3S1000-4FG900I XC3S1000-5FG1156I XC3S1000-5FG456I XC3S5000-4FG1156C XC3S5000-4FG320C XC3S5000-4FG320I XC3S5000-4FG676C XC3S5000-4FG900C XC3S5000-4FT256I XC3S5000-4PQ208C XC3S5000-4PQ208I XC3S5000-4VQ100C XC3S5000-5FG1156I XC3S5000 XC3S5000-4FG456I XC3S5000-4FG900I XC3S5000-4TQ144I XC3S5000-4VQ100I XC3S5000-5FG320I XC3S5000-5FG456C XC3S5000-5FG676I XC3S5000-4FG1156I XC3S5000-4TQ144C XC3S5000-5FG320C XC3S1000 XC3S1000-4FG320C XC3S50-5FG900C XC3S1500-4FG676C XC3S1500-4FG676I XC3S400-4FG1156C XC3S400-4FG1156I XC3S400-4FG320C XC3S400-4FG320I XC3S400-4FG456C XC3S400-4FG456I XC3S400-4FG676C XC3S400-4FG676I XC3S400-4FG900C XC3S400-4FG900I XC3S50 XC3S50-4FG1156C XC3S50-4FG1156I XC3S50-4FG320C XC3S50-4FG320I XC3S50-4FG456C XC3S50-4FG456I XC3S50-4FG676C XC3S50-4FG676I XC3S50-4FG900C XC3S50-4FG900I XC3S50-4FT256C XC3S50-4FT256I XC3S50-4PQ208C XC3S50-4PQ208I XC3S50-4TQ144C XC3S50-4TQ144I XC3S5000-5VQ100I XC3S1000-4FG1156I XC3S1000-4FG456C XC3S1000-4FG676C XC3S1000-4FG
OCR Text	...-ended signal standards - Seven differential signal standards including LVDS - Termination by Digitally Controlled Impedance - Signal swing ranging from 1.14V to 3.45V - Double Data Rate (DDR) support Logic resources - Abundant logic cells ...
Description	SPARTAN-3 FPGA FAMILY : COMPLETE DATA SHEET
File Size	1,650.35K / 192 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY55857L SY89327LMITR SY89327L SY89325LMGTR
OCR Text	DIFFERENTIAL TRANSLATOR Precision Edge(R) SY89327L Precision Edge(R) SY89327L FEATURES s Input accepts virtually all logic standar...to >2.5Gbps data rate throughput * DC-to >2.5GHz clock fMAX * < 400ps In-to-Out tpd * < 200ps tr/tf ...
Description	3.3V 2.5Gbps ANY INPUT-to-LVPECL DIFFERENTIAL TRANSLATOR
File Size	68.03K / 8 Page	View it Online	Download Datasheet

				HITACHI[Hitachi Semiconductor]
Part No.	HM62G18512BP-4 HM62G18512 HM62G18512BP-5
OCR Text	...User selective input trip-point Differential, HSTL clock inputs Asynchronous G output control Asynchronous sleep mode Limited set of boundar...to change without notice. Please contact your nearest Hitachi's Sales Dept. regarding specifications...
Description	8M Synchronous Fast Static RAM(512k-word x 18-bit)
File Size	119.90K / 23 Page	View it Online	Download Datasheet

				LATTICE[Lattice Semiconductor]
Part No.	ISPPAC-CLK5610V-01T100I ISPPAC-CLK5610V-01T48C ISPPAC-CLK5610V-01T48I ISPPAC-CLK5610V-01TN100C ISPPAC-CLK5610V-01TN48I ISPPAC-CLK5620V-01T100C ISPPAC-CLK5620V-01T100I ISPPAC-CLK5620V-01T48I ISPPAC-CLK5620V-01TN100C ISPPAC-CLK5620V-01TN100I ISPPAC-CLK5620V-01TN48C ISPPAC-CLK5620V-01TN48I ISPCLOCK5600 ISPPAC-CLK5610V-01T100C ISPPAC-CLK5610V-01TN100I ISPPAC-CLK5610V-01TN48C
OCR Text	...s up to 10 single-ended or five differential clock outputs, while the ispClock5620 provides up to 20 single-ended or 10 differential clock outputs. Each pair of outputs may be independently configured to support separate I/O standards (LVDS...
Description	In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
File Size	814.68K / 47 Page	View it Online	Download Datasheet

				Semtech Corporation
Part No.	SK10EP111
OCR Text	Differential ECL/PECL/HSTL Clock Driver SK10EP111 Preliminary Information This document contains information on a new product. The pa...to-Part Skew 35 ps Output-to-Output Skew Differential Design VBB Output Low Voltage VEE Range of -2....
Description	Low-Voltage 1:10 Differential ECL/PECL/HSTL Clock Driver
File Size	93.45K / 4 Page	View it Online	Download Datasheet

For differential-to-hstl Found Datasheets File :: 922 Search Time::4ms
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