4-mbit 256k x 18 pipelined dcd pdf Datasheet P13 Description --- IC-ON-LINE


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4-mbit 256k x 18 pipelined dcd Datasheet PDF File

For 4-mbit 256k x 18 pipelined dcd Found Datasheets File :: 150+ Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | <13> | 14 | 15 |

				Silicon Storage Technology Inc Silicon Storage Technology, Inc. SILICON STORAGE TECHNOLOGY INC
Part No.	49LF002 SST49LF003A-33-4C-NH SST49LF003A-33-4C-WH SST49LF002A-33-4C-WH SST49LF002A-33-4C-NH SST49LF004A-33-4C-NH SST49LF004A-33-4C-WH SST49LF008A-33-4C-WH SST49LF008A-33-4C-NH
Description	MB 6C 6#20 SKT PLUG 2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub 384K x 8 FLASH 3V PROM, 11 ns, PQCC32 2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub 256k x 8 FLASH 3V PROM, 11 ns, PQCC32 2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub 512K x 8 FLASH 3V PROM, 11 ns, PQCC32
File Size	394.84K / 36 Page	View it Online	Download Datasheet

				AMIC Technology, Corp.
Part No.	A67L7332SERIES A67L7336SERIES A67L8316SERIES A67L8318SERIES A67L7332E-4 A67L7332E-4.2 A67L7332E-4.5 A67L8318E-4.2 A67L8316E-4.2 A67L7336E-4.2 A67L7336E-4 A67L7336E-4.5 A67L8316E-4 A67L8318E-4 A67L8318E-4.5
Description	Cycle time:7ns; access time:4.5ns; 256k x 16 LVTTL, pipelined DBA SRAM Cycle time:7ns; access time:4ns; 256k x 16 LVTTL, pipelined DBA SRAM Cycle time:7ns; access time:4.2ns; 256k x 16 LVTTL, pipelined DBA SRAM Cycle time:7ns; access time:4.2ns; 128K x 32 LVTTL, pipelined DBA SRAM Cycle time:7ns; access time:4ns; 128K x 32 LVTTL, pipelined DBA SRAM 256k x 16/18. 128K x 32/36 LVTTL. pipelined DBA SRAM 256 × 16/18128K的x 32/36 LVTTL等级。流水线数据库管理员的SRAM 256k x 16/18, 128K x 32/36 LVTTL, pipelined DBA SRAM Cycle time:7ns; access time:4.5ns; 128K x 32 LVTTL, pipelined DBA SRAM Cycle time:7.5ns; access time:4.2ns; 128K x 32 LVTTL, pipelined DBA SRAM Cycle time:8.5ns; access time:4.5ns; 128K x 32 LVTTL, pipelined DBA SRAM
File Size	384.78K / 19 Page	View it Online	Download Datasheet

				Integrated Silicon Solution, Inc.
Part No.	IS61VPS25636A-200TQ2I IS61VPS25636A-250TQI
Description	256k x 36, 512K x 18 9 Mb SYNCHRONOUS pipelined, SINGLE CYCLE DESELECT STATIC RAM 256k x 36 CACHE SRAM, 3.1 ns, PQFP100 256k x 36, 512K x 18 9 Mb SYNCHRONOUS pipelined, SINGLE CYCLE DESELECT STATIC RAM 256k x 36 CACHE SRAM, 2.6 ns, PQFP100
File Size	482.83K / 35 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp. CYPRESS SEMICONDUCTOR CORP
Part No.	CY14B104NA-ZSP20xCT CY14B104NA-ZSP20xIT CY14B104LA-BA25xC CY14B104NA-BA20xC
Description	4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 256kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP 256k x 16 NON-VOLATILE SRAM, 20 ns, PDSO54 4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 512Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: FBGA 4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 256kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: FBGA
File Size	613.78K / 23 Page	View it Online	Download Datasheet

				Renesas Electronics Corporation. Renesas Electronics, Corp.
Part No.	M38030F2L-xxxHP M38030F2L-xxxKP M38030F2L-xxxSP M38030F2L-xxxWG M38030MAL-xxxWG M38030MAL-xxxKP M38030FAL-xxxSP M38031FAL-xxxHP M38030FAL-xxxWG M38030MAL-xxxHP M38030FAL-xxxKP M38031FAL-xxxKP M38030FAL-xxxHP M38031FAL-xxxSP M38031FAL-xxxWG M38030MAL-xxxSP M38030F3L-xxxHP M38030F3L-xxxWG M38030M3L-xxxKP M38030F3L-xxxSP M38030F3L-xxxKP M38030M3L-xxxHP M38030FBL-xxxWG M38030MBL-xxxHP M38030FBL-xxxHP M38030FBL-xxxSP M38030MBL-xxxKP M38030M2L-xxxHP M38030M2L-xxxKP M38030M2L-xxxSP M38030M2L-xxxWG M38031F2L-xxxHP M38031F2L-xxxKP M38031F2L-xxxSP M38031F2L-xxxWG M38030FB-xxxHP M38031FBL-xxxSP M38035MBL-xxxSP M38038FBL-xxxSP M38039FBL-xxxSP M38030MBL-xxxSP M38036MBL-xxxSP M38037FBL-xxxSP M38037MBL-xxxSP M38036FBL-xxxSP M38038MBL-xxxSP M38031FC-xxxHP M38031FC-xxxKP M38031FC-xxxWG M38031FCL-xxxHP M38031FCL-xxxKP M38031FCL-xxxSP M38031FCL-xxxWG M38031F5-xxxKP M38031F5-xxxSP M38031F5-xxxWG M38031F5L-xxxHP M38031F5L-xxxKP M38031F5L-xxxSP M38031F5L-xxxWG M38030F1-xxxHP M38030F1-xxxKP M38030F1-xxxSP M38030F1-xxxWG M38030F1L-xxxHP M38030F1L-xxxKP M38030F1L-xxxSP M38030F1L-xxxWG M38031F1-xxxKP M38031F1-xxxWG M38031F1L-xxxHP M38031F1L-xxxKP M38031F6-xxxHP M38031F6-xxxKP M38031F6-xxxSP M38031F6-xxxWG M
Description	256 Kbit (32K x 8) nvSRAM; Organization: 32Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 256 Kb; Package: SOIC 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C 256k (32K x 8) Static RAM; Density: 256 Kb; Organization: 32Kb x 8; Vcc (V): 4.50 to 5.50 V; Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 1 MHz to 200 MHz; Outputs: 6 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 256; Vcc (V): 3.3; fMax (MHz): 66; tPD (ns): 12 8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V; 9-Mbit (256k x 36/512K x 18) pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 9-Mbit (256k x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V Four Output PCI-x and General Purpose Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 140 MHz; Outputs: 4; Operating Range: 0 to 70 C 18-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 9-Mbit (256k x 36/512K x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 2.4 to 2.6 V 4-mbit (512K x 8) Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.50 to 5.50 V; 4-mbit (256k x 16) Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 2.20 to 3.60 V; 64K x 16 Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V; 1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 4.5 to 5.5 V; 9-Mbit (256k x 36/512K x 18) pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V 1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V; 4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 512Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP 4 Mbit (512K x 8/256k x 16) nvSRAM; Organization: 256kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP 16-Mbit (1M x 16 / 2M x 8) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 4.50 to 5.50 V; 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY; Density: 128 Kb; Organization: 8Kb x 16; Vcc (V): 4.5 to 5.5 V; Speed: 35 ns 9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V 9-Mbit (256k x 36/512K x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V 9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 2.4 to 2.6 V 9-Mbit (256k x 36/512K x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V 8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 4.50 to 5.50 V; 9-Mbit (256k x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V 256k x 16 Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 4.5 to 5.5 V; 9-Mbit (256k x 36/512K x 18) pipelined dcd Sync SRAM; Architecture: Standard Sync, Pipeline dcd; Density: 9 Mb; Organization: 256kb x 36; Vcc (V): 3.1 to 3.6 V 4-mbit (256k x 16) Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 3.0 to 3.6 V; 8-Mbit (1024K x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V; 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 256k x 16 Static RAM; Density: 4 Mb; Organization: 256kb x 16; Vcc (V): 3.0 to 3.6 V; 8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V; 3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: -40 to 85 C Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 512K x 8 Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.5 to 5.5 V; 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 2.4 to 2.6 V 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 2M x 8 Static RAM; Density: 16 Mb; Organization: 2Mb x 8; Vcc (V): 3.0 to 3.6 V; 16 Mbit (512K x 32) Static RAM; Density: 16 Mb; Organization: 512Kb x 32; Vcc (V): 3.0 to 3.6 V; 3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: 0 to 70 C 8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 3.0 to 3.6 V; 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 16-Mbit (1M x 16) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V; 4-mbit (256k x 18) pipelined dcd Sync SRAM; Architecture: Standard Sync, Pipeline dcd; Density: 4 Mb; Organization: 256kb x 18; Vcc (V): 3.1 to 3.6 V 512K (32K x 16) Static RAM; Density: 512 Kb; Organization: 32Kb x 16; Vcc (V): 3.0 to 3.6 V; 4-mbit (128K x 36) pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V 1M x 16 Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V; Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C MoBL(R) 2 Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; Rambus(R) xDR(TM) Clock Generator; VDD: 2.5 V; Input Frequency: 100 MHz to 133 MHz; Output Frequency: 300 MHz to 800 MHz; # Out: 4 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 4-mbit (128K x 36) pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 167; tPD (ns): 7 2.5V or 3.3V, 200-MHz, 1:10 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 10; Operating Range: 0 to 70 C 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 100; tPD (ns): 7 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 7 18-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 25 MHz to 100 MHz; Output Frequency Range: 25 MHz to 100 MHz; Operating Range: 0 to 70 C; Package: SOIC Low Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 143; tPD (ns): 9 单芯位CMOS微机 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 154; tPD (ns): 6 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9 单芯位CMOS微机 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 3.3; fMax (MHz): 83; tPD (ns): 10 单芯位CMOS微机 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6 单芯位CMOS微机 Three-PLL General-Purpose EPROM Programmable Clock Generator; Voltage (V): 3.3/5.0 V; Input Range: 1 MHz to 30 MHz; Output Range: .077 MHz to 100 MHz; Outputs: 6 单芯位CMOS微机 8-Mbit (512K x 16) MoBL(R) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机 High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C 单芯位CMOS微机 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 100 MHz; Outputs: 10; Operating Range: 0 to 70 C 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: -40 to 85 C 单芯位CMOS微机 Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 单芯位CMOS微机 MoBL(R) 1 Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机 18-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 1-Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 4.50 to 5.50 V; 单芯位CMOS微机 4-mbit (256k x 18) pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 256kb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 2-Mbit (64K x 32) pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 2 Mb; Organization: 64Kb x 32; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 200-MHz Field Programmable Zero Delay Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 10 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C 单芯位CMOS微机 2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 2-Mbit (256k x 8) Static RAM; Density: 2 Mb; Organization: 256kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯8位CMOS微机 Very Low Jitter Field and Factory Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 10 MHz to 133 MHz; Output Range: 20 MHz to 200 MHz; Outputs: 2 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 单芯位CMOS微机 Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 0 MHz to 200 MHz; Outputs: 3 单芯位CMOS微机 1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机 Quad PLL Clock Generator with 2-Wire Serial Interface; Voltage (V): 2.5/3.3 V; Input Range: 27 MHz to 27 MHz; Output Range: 4.2 MHz to 166 MHz; Outputs: 5 单芯位CMOS微机 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C 单芯位CMOS微机 3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C 单芯位CMOS微机 High Speed Multi-phase PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 24 MHz to 200 MHz; Outputs: 11; Operating Range: 0 to 70 C 单芯位CMOS微机 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 18; Operating Range: -40 to 85 C 单芯位CMOS微机 -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 位AVR微控制器具有8K字节的系统内可编程闪 2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C 1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: 0 to 70 C Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 4 MHz to 32 MHz; Output Frequency Range: 4 MHz to 32 MHz; Operating Range: 0 to 70 C; Package: SOIC High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C 5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9
File Size	1,602.57K / 119 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1379B-117AC CY7C1379B-117BZC CY7C1379B
Description	9-Mbit (256k x 32) Flow-through SRAM with NoBL(TM) Architecture 9-Mbit (256k x 32) Flow-through SRAM with NoBL⑩ Architecture 9-Mbit (256k x 32) Flow-through SRAM with NoBL垄芒 Architecture 9-Mbit (256k x 32) Flow-through SRAM with NoBL Architecture
File Size	356.46K / 15 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1370D-167AxI CY7C1370D-167BGC CY7C1370D-250BZC CY7C1370D-250BZxC CY7C1370D-250BZxI CY7C1370D06 CY7C1370D-250AxC CY7C1370D-250AxI CY7C1370D-250BGC CY7C1370D-250BGI CY7C1370D-250BGxC CY7C1370D-250BGxI CY7C1370D-250BZI CY7C1372D-167BGxC CY7C1372D-250BGxC CY7C1372D-250BZxC CY7C1372D-250BGxI CY7C1370D-200BGxC CY7C1370D-200BGxI CY7C1370D-200BZxC CY7C1372D-200BGxC CY7C1372D-200BGxI CY7C1370D-167AxC CY7C1370D-167BGI CY7C1370D-167BGxC CY7C1370D-167BGxI CY7C1370D-167BZC CY7C1370D-167BZI CY7C1372D-200BZxI CY7C1372D-200BZxC CY7C1370D-200BZxI CY7C1372D-167BGxI CY7C1372D-167BZxC CY7C1372D-167BZxI CY7C1370D-167BZxC CY7C1370D-167BZxI
Description	18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL垄芒 Architecture 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL Architecture 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL?/a> Architecture
File Size	463.98K / 28 Page	View it Online	Download Datasheet

				CYPRESS[Cypress Semiconductor]
Part No.	CY7C1370DV25 CY7C1370DV25-200BZI CY7C1370DV25-250BGxI CY7C1370DV25-250BZC CY7C1372DV25-250 CY7C1372DV25-250BZxI CY7C1370DV25-167 CY7C1370DV25-167AxC CY7C1370DV25-167AxI CY7C1370DV25-167BGC CY7C1370DV25-167BGI CY7C1370DV25-167BGxC CY7C1370DV25-167BGxI CY7C1370DV25-167BZC CY7C1370DV25-167BZI CY7C1370DV25-167BZxC CY7C1370DV25-167BZxI CY7C1370DV25-200 CY7C1370DV25-200AxC CY7C1370DV25-200AxI CY7C1370DV25-200BGC CY7C1370DV25-200BGI CY7C1370DV25-200BGxC CY7C1370DV25-200BGxI CY7C1370DV25-200BZC CY7C1370DV25-200BZxC CY7C1370DV25-200BZxI CY7C1370DV25-250 CY7C1370DV25-250AxC CY7C1370DV25-250AxI CY7C1370DV25-250BGC CY7C1370DV25-250BGI CY7C1370DV25-250BGxC CY7C1370DV25-250BZI CY7C1370DV25-250BZxC CY7C1370DV25-250BZxI CY7C1372DV25 CY7C1372DV25-167 CY7C1372DV25-167AxC CY7C1372DV25-167AxI CY7C1372DV25-167BGC CY7C1372DV25-167BGI CY7C1372DV25-167BGxC CY7C1372DV25-167BGxI CY7C1372DV25-167BZC CY7C1372DV25-167BZI CY7C1372DV25-167BZxC CY7C1372DV25-167BZxI CY7C1372DV25-200 CY7C1372DV25-200AxC CY7C1372DV25-200AxI CY7C1372DV25-200BGC CY7C1372DV25-200BGI CY7C1372DV25-200BGxC CY7C1372DV25-200BGxI CY7C1372DV25-200BZC CY7C1372DV25-200BZI CY7C1372DV25-200BZxC CY7C1372DV25-200BZxI CY7C1372DV25-250AxC CY7C1372DV2
Description	18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL(TM) Architecture 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL⑩ Architecture 18-Mbit (512K x 36/1M x 18) pipelined SRAM with NoBL??Architecture
File Size	418.73K / 30 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1350G06 CY7C1350G-250BGxI CY7C1350G-250BGxC CY7C1350G-166BGxC CY7C1350G-133BGxI CY7C1350G-133BGxC CY7C1350G-200AxC CY7C1350G-200AxI CY7C1350G-200BGC CY7C1350G-200BGI CY7C1350G-200BGxC CY7C1350G-200BGxI CY7C1350G-166BGxI CY7C1350G-100AxC CY7C1350G-100AxI CY7C1350G-100BGC CY7C1350G-100BGI CY7C1350G-100BGxC CY7C1350G-100BGxI CY7C1350G-133AxC CY7C1350G-133AxI CY7C1350G-133BGC CY7C1350G-133BGI CY7C1350G-166AxC CY7C1350G-166AxI CY7C1350G-166BGC CY7C1350G-166BGI
Description	4-mbit (128K x 36) pipelined SRAM with NoBL⑩ Architecture 4-mbit (128K x 36) pipelined SRAM with NoBL?/a> Architecture 4-mbit (128K x 36) pipelined SRAM with NoBL Architecture
File Size	335.37K / 15 Page	View it Online	Download Datasheet

				CYPRESS[Cypress Semiconductor]
Part No.	CY7C1302CV25-167 CY7C1302CV25 CY7C1302CV25-133 CY7C1302CV25-133BZC CY7C1302CV25-100 CY7C1302CV25-100BZC CY7C1302CV25-167BZC
Description	9-Mbit Burst of Two pipelined SRAMs with QDR(TM) Architecture 9-Mbit Burst of Two pipelined SRAMs with QDR⑩ Architecture 9-Mbit Burst of Two pipelined SRAMs with QDR Architecture
File Size	287.33K / 18 Page	View it Online	Download Datasheet

For 4-mbit 256k x 18 pipelined dcd Found Datasheets File :: 150+ Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | <13> | 14 | 15 |

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