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ATMEL[ATMEL Corporation]
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Part No. |
ATDH2225
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OCR Text |
..., XC5200, Spartan(R), Spartan2, virtex(R), virtexE Altera - EPF6K, EPF8K, EPF10K Cypress - Delta39K15, 39K30, 39K50, 39K100, 39K165, 39K200
In-System Programming Cable ATDH2225 FPGA Configuration EEPROM Memory
Software Support
Make s... |
Description |
In-System Programming Cable
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File Size |
75.07K /
7 Page |
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it Online |
Download Datasheet |
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Xilinx
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Part No. |
XC2S200E
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OCR Text |
...rchitecture based on the proven virtex?-e platform. features include block ram (to 288k bits), distributed ram (to 221,184 bits), 19 select- able i/o standards, and four dlls (delay-locked loops). fast, predictable interconnect means that s... |
Description |
(XC2SxxxE) Spartan IIE 1.8V FPGA Family
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File Size |
836.47K /
103 Page |
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it Online |
Download Datasheet |
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Xilinx, Inc.
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Part No. |
XC2S15 XC2S50 XC2S30 XC2S150 XC2S100 XC2S200
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OCR Text |
...s technology with a streamlined virtex-based architec- ture. features include block ram (to 56k bits), distributed ram (to 75,264 bits), 16 selectable i/o standards, and four dlls. fast, predictable interconnect means that successive design... |
Description |
Spartan-II 2.5V FPGA(Spartan-II 2.5V现场可编程门阵列)
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File Size |
43.41K /
4 Page |
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it Online |
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Xilinx, Inc.
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Part No. |
XC2S50E-6PQG208C XC2S300E-6PQG208I
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OCR Text |
...rchitecture based on the proven virtex?-e platform. features include block ram (to 288k bits), distributed ram (to 221,184 bits), 19 select- able i/o standards, and four dlls (delay-locked loops). fast, predictable interconnect means that s... |
Description |
50,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 384 CLBS, 23000 GATES, 357 MHz, PQFP208 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN FPGA, 1536 CLBS, 93000 GATES, 357 MHz, PQFP208
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File Size |
810.82K /
103 Page |
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it Online |
Download Datasheet |
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XILINX
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Part No. |
XC2S200-5F XC2S100-5T XC2S100-5TQ144C XC2S150-5PQ208C
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OCR Text |
...s technology with a streamlined virtex-based architecture. Features include block RAM (to 56K bits), distributed RAM (to 75,264 bits), 16 selectable I/O standards, and four DLLs. Fast, predictable interconnect means that successive design i... |
Description |
Spartan-ii Field Programmable Gate Array
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File Size |
742.42K /
99 Page |
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it Online |
Download Datasheet |
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Price and Availability
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