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SAMSUNG SEMICONDUCTOR CO. LTD.
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| Part No. |
LTM170EU-L11
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| OCR Text |
...oller) source drive ic (x10ea) (rsds) gate drive ic (x4ea) video data control signal gamma vcom dvdd avdd von/voff rsds signal 4.2 back-light unit connector : jst bhsr-02vs-1 or equivalent lamp(ccfl) cold(white) hot(pink) 1 2 lamp(ccfl) col... |
| Description |
Color Active Matrix TFT Liquid crystal display
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| File Size |
748.15K /
24 Page |
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Xilinx
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| Part No. |
XC3SD1800A
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| OCR Text |
...te per differential i/o ? lvds, rsds, mini-lvds, hstl/sstl differential i/o with integrated differential termination resistors ? enhanced double data rate (ddr) support ? ddr/ddr2 sdram support up to 333 mb/s ? fully compliant 32-/64-bit, ... |
| Description |
(XC3SD1800A / XC3SD3400A) Spatran-3A DSP FPGA Family
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| File Size |
1,466.82K /
98 Page |
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Xilinx, Inc.
XILINX INC
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| Part No. |
DS312 XC3S100E-4CP132C XC3S100E-4CP132I XC3S100E-5CP132C XC3S250E-5FT256C XC3S100E-4VQG100C XC3S250E-4FTG256I XC3S250E-4PQG208C XC3S250E-4PQ208I XC3S250E-4PQ208C XC3S100E-5VQ100C XC3S100E-5TQ144C XC3S100E-4CPG132I XC3S1600E-4FGG320C XC3S250E-5FTG256C XC3S500E-4CPG132I XILINXINC-XC3S500E-4CP132I XC3S250E-4VQG100C TQG144
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| OCR Text |
...nsfer rate per i/o - true lvds, rsds, mini-lvds, differential hstl/sstl differential i/o - enhanced double data rate (ddr) support - ddr sdram support up to 333 mb/s ? abundant, flexible logic resources - densities up to 33,192 logic cells... |
| Description |
Spartan-3E FPGA Family: Introduction and Ordering Information
XC3S100E-4CP132C FPGA, 240 CLBS, 100000 GATES, 572 MHz, PBGA132
XC3S100E-4CP132I FPGA, 240 CLBS, 100000 GATES, 572 MHz, PBGA132
XC3S100E-5CP132C FPGA, 240 CLBS, 100000 GATES, 657 MHz, PBGA132
XC3S250E-5FT256C FPGA, 612 CLBS, 250000 GATES, 657 MHz, PBGA256
XC3S100E-4VQG100C FPGA, 240 CLBS, 100000 GATES, 572 MHz, PQFP100
XC3S250E-4FTG256I FPGA, 612 CLBS, 250000 GATES, 572 MHz, PBGA256
XC3S250E-4PQG208C FPGA, 612 CLBS, 250000 GATES, 572 MHz, PQFP208
XC3S250E-4PQ208I FPGA, 612 CLBS, 250000 GATES, 572 MHz, PQFP208
XC3S250E-4PQ208C FPGA, 612 CLBS, 250000 GATES, 572 MHz, PQFP208
XC3S100E-5VQ100C FPGA, 240 CLBS, 100000 GATES, 657 MHz, PQFP100
XC3S100E-5TQ144C FPGA, 240 CLBS, 100000 GATES, 657 MHz, PQFP144
XC3S100E-4CPG132I FPGA, 240 CLBS, 100000 GATES, 572 MHz, PBGA132
XC3S1600E-4FGG320C FPGA, 3688 CLBS, 1600000 GATES, 572 MHz, PBGA320
XC3S250E-5FTG256C FPGA, 612 CLBS, 250000 GATES, 657 MHz, PBGA256
XC3S500E-4CPG132I FPGA, 1164 CLBS, 500000 GATES, 572 MHz, PBGA132
XC3S250E-4VQG100C
Absolute Maximum Ratings
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| File Size |
3,431.56K /
233 Page |
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Chi Mei
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| Part No. |
V315H1-PH2
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| OCR Text |
... 3.1 tft lcd open cell 3.2 rsds characteristics 4. block diagram --------------------------------------------------- ---- 10 4.1 tft lcd open cell 5. input terminal pin assignment ----------------------------------------... |
| Description |
TFT Liquid Crystal Display module
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| File Size |
1,247.66K /
31 Page |
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http://
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| Part No. |
ADE3800XT ADE3800XL
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| OCR Text |
rsds transmitters ade3800 feature overview programmable context sensitive? filtering high-quality up-scaling and down-scaling integrated 10-bit triple channel adc/pll iqsync? autosetup integrated programmable timing controller integra... |
| Description |
Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and rsds Transmitters
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| File Size |
1,791.29K /
138 Page |
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http://
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| Part No. |
UPD160083
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| OCR Text |
...024) tft-lcd panels. features rsds tm (reduced swing differential signaling) interface 480 outputs input of 8 bits (gradation data) by 3 dots with double clock edge sampling capable of outputting 256 values by means of 9-by-2 exter... |
| Description |
480-OUTPUT TFT-LCD SOURCE DRIVER
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| File Size |
234.11K /
22 Page |
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Download Datasheet |
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Price and Availability
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