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For sub-circuit Found Datasheets File :: 12000    Search Time::6.796ms    
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    CXD2508AQ CXD2508AR

SONY[Sony Corporation]
Part No. CXD2508AQ CXD2508AR
OCR Text ...XUGF 49 GTOP 48 EFM demodulator SUB code Processor 1 CPU interface 22 XLON 19 SPOA to C 11 CLOK 10 XLAT 9 7 DATA SENS 17 CLKO digit...circuit. Comparator voltage input of asymmetry compensation circuit. EFM full-swing output (low = Vs...
Description From old datasheet system
CD Digital Signal Processor

File Size 854.77K  /  49 Page

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    CXD2529Q

Sony Corporation
Part No. CXD2529Q
OCR Text ...tion * Subcode demodulation and Sub Q data error detection * Digital spindle servo * 16-bit traverse counter * Asymmetry compensation circuit * Serial bus-based CPU interface * Error correction monitor signals, etc. are output from a new CP...
Description From old datasheet system
CD Digital Signal Processor

File Size 671.86K  /  64 Page

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    CXD3068Q

Sony Corporation
Part No. CXD3068Q
OCR Text ...mute * Subcode demodulation and Sub-Q data error detection * Digital spindle servo * 16-bit traverse counter * Asymmetry correction circuit * CPU interface on serial bus * Error correction monitor signal, etc. output from a new CPU interfac...
Description CD Digital Signal Processor with Built-in Digital Servo

File Size 1,217.71K  /  134 Page

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    CXL1501 CXL1501M

SONY[Sony Corporation]
Part No. CXL1501 CXL1501M
OCR Text ...with a video noise meter in the Sub Carrier Trap mode at BPF 100kHz to 4MHz. Vn [Vrms] The signal component is determined either by testing ...Circuit 9V CLK fSC (3.579545MHz) 0.5Vp-p sine wave 1 SW5 196.678kHz 500mVp-p sine wave 196.678kHz 1...
Description CMOS-CCD Signal Processor

File Size 179.83K  /  12 Page

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    CXL1504M

SONY[Sony Corporation]
Part No. CXL1504M
OCR Text ...d Pin Configuration (Top View) SUB CLK VDD VDD VSS VSS 11 10 NC NC NC 20 19 18 17 16 15 14 13 12 Autobias circuit Pulse generation circuit Clock driver 1 2 Output circuit, S/H circuit Bias circuit...
Description CMOS-CCD 1H Delay Line for NTSC

File Size 111.86K  /  9 Page

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    CXL1506 CXL1506M CXL1506N

SONY[Sony Corporation]
Part No. CXL1506 CXL1506M CXL1506N
OCR Text ...with a video noise meter in the Sub Carrier Trap mode at BPF 100kHz to 5MHz. (Vn [Vrms]) The signal component is determined either by testin...Circuit (CXL1506M) 5V Note) When VCO OUT is required, use the circuit below. 5V 0.1 0.1 1000P 2SC...
Description CMOS-CCD 1H/2H Delay Line for PAL

File Size 168.57K  /  12 Page

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    CXL5502M CXL5502N CXL5502P

SONY[Sony Corporation]
Part No. CXL5502M CXL5502N CXL5502P
OCR Text ...ly (5V) Autobias DC output GND (SUB) 600 to 200k > 100k 40 to 500 Impedance > 10k at no clamp CXL5502N Pin No. 1 2 3 4 5 6 7 8 9 10 11 12...Circuit" Bias condition Vbias1 (V) Min. 1234567 (Note 1) Item Supply current Low frequency gain ...
Description CMOS-CCD 1H Delay Line for NTSC

File Size 185.05K  /  13 Page

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    CXL5504M CXL5504P

Sony, Corp.
SONY[Sony Corporation]
Part No. CXL5504M CXL5504P
OCR Text ...e meter, in BPF 100kHz to 4MHz, Sub Carrier Trap mode. 178mV 321mV 143mV 1H 63.56s Input waveform (Input waveform of NP mode is ...Circuit CLK 4fSC (14.318182MHz) 0.5Vp-p sine wave 3.3 b SW5 a 1000p 1000p 200kHz 500m...
Description CMOS-CCD 1H Delay Line for NTSC CMOS与CCD延迟线上半年对NTSC

File Size 133.95K  /  11 Page

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    CXL5505M CXL5505P

SONY[Sony Corporation]
Part No. CXL5505M CXL5505P
OCR Text ...y (5V) Auto-bias DC output GND (SUB) 600 to 200k > 10k 40 to 500 Impedance > 10k at no clamp Description of Pin 3 (VG2) Control of input...Circuit" Item Supply current Low frequency gain Symbol IDD GL Test condition -- 200kHz, 500mVp-p, s...
Description CMOS-CCD 1H Delay Line for PAL

File Size 124.17K  /  9 Page

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    CXL5506M CXL5506P

SONY[Sony Corporation]
Part No. CXL5506M CXL5506P
OCR Text ...e meter, in BPF 100kHz to 5MHz, Sub Carrier Trap mode. 175mV 325mV 150mV 1H 64s Input waveform Clock 4fsc (17.734475MHz) sine w...Circuit CLK 4fSC (17.734475MHz) 0.5Vp-p sine wave 3.3 1000p 200kHz 500mVp-p sine wave 10...
Description CMOS-CCD 1H Delay Line for PAL

File Size 106.48K  /  9 Page

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