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ST Microelectronics
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Part No. |
ST20196
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OCR Text |
...ayer has been implemented. the cached arm? micro-controller allows further improvement of the performances and allows fast and easy integration with the major third party network processors. data is exchanged over the utopia level1 or 2 in... |
Description |
ADSL2 UTOPIA DMT TRANSCEIVER FOR CPE APPLICATIONS
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File Size |
368.18K /
31 Page |
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it Online |
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FREESCALE[Freescale Semiconductor, Inc]
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Part No. |
MCF5253VM140 MCF5253
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OCR Text |
...system performance by providing cached instructions to the execution unit in a single clock cycle. The two-wire I2C bus interfaces, compliant with the Philips I2C bus standard, are bidirectional serial buses that exchange data between devic... |
Description |
ColdFire㈢ Microprocessor Data Sheet
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File Size |
222.41K /
32 Page |
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Bourns, Inc.
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Part No. |
PPC403GB-KA28C-1
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OCR Text |
...rations. the cache can send two cached instructions per cycle to the execution unit, allowing instructions to be folded out of the queue without interrupting normal instruction flow. when a branch instruc- tion is folded and executed in ... |
Description |
32-Bit Microprocessor 32位微处理
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File Size |
364.34K /
44 Page |
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it Online |
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飞思卡尔半导体(中国)有限公司 椋???″????浣?涓??)??????
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Part No. |
MCF5251 MCF5251CEVM140
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OCR Text |
...ystem performance by providing cached instructions to the execution unit in a single clock cycle. i 2 c inter ic communication module connectivity peripheral the two-wire i 2 c bus interfaces, compliant with the philips i 2 c bus st... |
Description |
ColdFire Processor
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File Size |
284.26K /
32 Page |
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it Online |
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飞思卡尔半导体(中国)有限公司
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Part No. |
MCF5253
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OCR Text |
...ystem performance by providing cached instructions to the execution unit in a single clock cycle. i 2 c inter ic communication module connectivity peripheral the two-wire i 2 c bus interfaces, compliant with the philips i 2 c bus st... |
Description |
ColdFireMicroprocessor Data Sheet
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File Size |
229.05K /
32 Page |
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it Online |
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Motorola
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Part No. |
MPC566
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OCR Text |
...n optimized for automotive (non-cached) applications ? new compression scheme increases compression performance to 40% ? 50% compres- sion ? 4-kbyte static decram can be used as memory if compression is not used. ? general-purpose i/o suppo... |
Description |
(MPC565 / MPC566) RISC MCU
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File Size |
135.84K /
12 Page |
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it Online |
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Price and Availability
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