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Xilinx, Inc.
XILINX INC
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| Part No. |
XA3S200-4TQG144I XA3S400-4FGG456I XA3S200-4VQG100I XA3S50-4VQG100Q XA3S1500-4FGG456I
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| OCR Text |
...led logic 2.5 n/a lvpecl_25 no rsds reduced-swing differential signaling 2.5 n/a rsds_25 no hstl differential high-speed transceiver logic 1.8 ii diff_hstl_ii_18 ye s sstl differential stub series terminated logic 2.5 ii diff_sstl2_ii ye s... |
| Description |
XA3S200-4TQG144I FPGA, 480 CLBS, 200000 GATES, PQFP144
XA3S400-4FGG456I FPGA, 896 CLBS, 400000 GATES, PBGA456
AUTOMOTIVE FPGA, 480 CLBS, 200000 GATES, PQFP100
FPGA, 192 CLBS, 50000 GATES, PQFP100
Revolutionary 90-nanometer process technology
Revolutionary 90-nanometer process technology
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| File Size |
197.79K /
8 Page |
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Xilinx, Inc.
XILINX INC
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| Part No. |
XC3S50A-4VQ100C XC3S700A-5FG400C XC3S700A-5FT256C XC3S700A-4FGG484C XC3S50A-4VQ100I XC3S1400A-4FT256C XC3S1400A-5FTG256C
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| OCR Text |
...b/s rate using scd 4103 ? lvds, rsds, mini-lvds, hstl/sstl differential i/o with integrated differential termination resistors ? enhanced double data rate (ddr) support ? ddr/ddr2 sdram support up to 400 mb/s ? fully compliant 32-/64-bit, ... |
| Description |
Extended Spartan-3A FPGAs, Package: 4VQ100C FPGA, PQFP100
FPGA, 1472 CLBS, 700000 GATES, 280 MHz, PBGA400
FPGA, PBGA256
Extended Spartan-3A FPGAs, Package: 4FGG484C
Extended Spartan-3A FPGAs, Package: 4FT256C
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| File Size |
2,317.13K /
128 Page |
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MINI
XILINX[Xilinx, Inc]
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| Part No. |
XC3S1200E-4CP132I XC3S1200E-4CPG132I XC3S1200E-4FG400C XC3S1200E-4FGG484C XC3S1200E-4FGG484I XC3S1200E-4FTG256C XC3S1200E-4VQ100C XC3S250E-4CP132C XC3S250E-4CPG132I XC3S250E-4FG320I XC3S250E-4FG400C XC3S250E-4FGG320C XC3S250E-4FGG320I XC3S250E-4FGG400C XC3S250E-4FGG484I XC3S250E-4FT256I XC3S250E-4FTG256C XC3S250E-4FTG256I XC3S250E-4TQ144I XC3S250E-4VQ100C XC3S1600E-4CP132I XC3S1600E-4FG320I XC3S1600E-4FG400I XC3S1600E-4TQG144C XC3S100E ZLW-11 XC3S500E XC3S1200E XC3S250E-4VQ100I XC3S500E-5VQG100I XC3S100E-4CP132C XC3S100E-4CP132I XC3S100E-4CPG132C XC3S100E-4CPG132I XC3S100E-4FG320C XC3S100E-4FG320I XC3S100E-4FG400C XC3S100E-4FG400I XC3S100E-4FG484C XC3S100E-4FG484I XC3S100E-4FGG320C XC3S100E-4FGG320I XC3S100E-4FGG400C XC3S100E-4FGG400I XC3S100E-4FGG484C XC3S100E-4FGG484I XC3S100E-4FT256C XC3S100E-4FT256I XC3S100E-4FTG256C XC3S100E-4FTG256I XC3S100E-4PQ208C XC3S100E-4PQ208I XC3S100E-4PQG208C XC3S100E-4PQG208I XC3S100E-4TQ144C XC3S100E-4TQ144I XC3S100E-4TQG144C XC3S100E-4TQG144I XC3S100E-4VQ100C XC3S100E-4VQ100I XC3S100E-4VQG100C XC3S100E-4VQG100I XC3S100E-5CP132C XC3S100E-5CP132I XC3S100E-5CPG132C XC3S100E-5CPG132I XC3S100E-5FG320C XC3S100E-5FG320I XC3S100E-5FG400C XC3S100E-5FG400I X
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| OCR Text |
...bility with ASICs. - True LVDS, rsds, mini-LVDS differential I/O - 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling - Enhanced Double Data Rate (DDR) support Abundant, flexible logic resources - Densities up to 33,192 logic cells, including optio... |
| Description |
SPARTAN-3E FPGA FAMILY
Frequency Mixer Level 7 (LO Power 7 dBm) 5 to 2000 MHz
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| File Size |
1,672.55K /
193 Page |
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SHARP[Sharp Electrionic Components]
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| Part No. |
LH168M
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| OCR Text |
...n TCP (Tape Carrier Package)
* rsds is a trademark of National Semiconductor Corporation. SHARP recommends FPD87310 of National Semiconductor Corporation as a timing controller for rsdsTM.
XO1 1 YO1 2 ZO1 3
434 433 432 431 430 429 42... |
| Description |
384-output TFT-LCD Source Driver IC
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| File Size |
104.45K /
17 Page |
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Xilinx, Inc.
XILINX INC
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| Part No. |
XC3SD3400A-4CSG484LI XC3SD3400A-4FGG676C
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| OCR Text |
...b/s rate using scd 4103 ? lvds, rsds, mini-lvds, hstl/sstl differential i/o with integrated differential termination resistors ? enhanced double data rate (ddr) support ? ddr/ddr2 sdram support up to 333 mb/s ? fully compliant 32-/64-bit, ... |
| Description |
Extended Spartan-3A FPGAs, Package: 4CSG484LI FPGA, 5968 CLBS, 3400000 GATES, 250 MHz, PBGA484
Extended Spartan-3A FPGAs, Package: 4FGG676C FPGA, 5968 CLBS, 3400000 GATES, 250 MHz, PBGA676
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| File Size |
1,352.75K /
99 Page |
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Altera, Corp.
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| Part No. |
EP1C3T100I7N
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| OCR Text |
...bps) lvds i/o support 311-mbps rsds i/o support up to two plls per device provid e clock multiplication and phase shifting up to eight global clock lines with six clock resources available per logic array block (lab) row support for e... |
| Description |
FPGA, 2910 CLBS, 320 MHz, PQFP100 16 X 16 MM, 0.50 MM PITCH, TQFP-100
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| File Size |
805.59K /
106 Page |
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it Online |
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Price and Availability
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