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82401444 MC33183 EL6296 13HSDJ 13443 98810 04018 E45706
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    Sanyo Electric Co., Ltd.
Part No. LC866548
OCR Text ... input/output port programmable nibble unit : 1 port (8 terminals : port 0) (when the n-channel open drain output is selected, the data in a bit can be inputted.) input/output port programmable in a bit : 1 port (8 terminals : port 3)...
Description 8-Bit Single Chip Microcontroller 8位单片机微控制器

File Size 643.65K  /  21 Page

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    SPT
Part No. SPT574
OCR Text ...three-state buffers and control nibble a nibble b nibble c 12-bit sar + - comp clock offset/gain trim control logic 12-bit capacitance dac sts a oce agnd 20 v in 12/8 cs r/c ref ref out 10 v in bip off output signal processing technologies,...
Description COMPLETE 12-BIT uP COMPATIBLE A/D CONVERTER

File Size 110.63K  /  12 Page

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    SL74HC257 SL74HC257D SL74HC257N HC257

System Logic Semiconductor Co., Ltd.
SLS[System Logic Semiconductor]
Part No. SL74HC257 SL74HC257D SL74HC257N HC257
OCR Text .... This device selects a (4-bit) nibble from either the A or B inputs as determined by the Select input. The nibble is presented at the outputs in noninverted from when the Output Enable pin is at a low level. A high level on the Output Enab...
Description ; Collector Current:0.3A; Package/Case:3-TO-92; DC Current Gain Max (hfe):70000
Quad 2-Input Data Selector/Multiplexer with 3-State Outputs

File Size 46.71K  /  5 Page

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    SL74HC258 SL74HC258D SL74HC258N

SLS[System Logic Semiconductor]
Part No. SL74HC258 SL74HC258D SL74HC258N
OCR Text .... This device selects a (4-bit) nibble from either the A or B inputs as determined by the Select input. The nibble is presented at the outputs in inverted form when the Output Enable pin is at a low level. A high level on the Output Enable ...
Description Quad 2-Input Data Selectors/Multiplexer with 3-State Outputs

File Size 65.50K  /  6 Page

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    74AC16244 74AC16244SSC 74ACT16244MTD 74ACT16244SSC 74ACT16244 74ACT16244SSCX 74AC16244SSCX

Fairchild Semiconductor, Corp.
Part No. 74AC16244 74AC16244SSC 74ACT16244MTD 74ACT16244SSC 74ACT16244 74ACT16244SSCX 74AC16244SSCX
OCR Text ...smitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. Features s Separate control logic for each byte and nibble s 16-bit version of t...
Description From old datasheet system
Octal Serial/Parallel Register with Sign Extend
Complete, Dual, 12-Bit Multiplying DAC with 8-Bit Bus Interface ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48
16-Bit Buffer/Line Driver with 3-STATE Outputs ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48

File Size 68.64K  /  7 Page

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    Cypress
Part No. CY7C1422AV18-167BZXC CY7C1423AV18 CY7C1423AV18-167BZXC
OCR Text ...). nws [1:0] input- synchronous nibble write select 0, 1 ? active low (cy7c1422av18 only) . sampled on the rising edge of the k and k clocks during write operations. used to sele ct which nibble is written into the device during the cu...
Description 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture

File Size 249.34K  /  23 Page

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    IDT
Part No. IDT77V106L25TFI IDT77V106L25TFI8
OCR Text ...iver- descrambler pseudo-random nibble generators (prng) to their initial states. the following cell illustrates the insertion of a start-of-cell command without scrambler/descrambler reset. during this cell?s transmission, an 8khz timing s...
Description 1 Channel 25/51Mbps, PHY, U1

File Size 253.74K  /  27 Page

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