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  lvpecl lvds cmos Datasheet PDF File

For lvpecl lvds cmos Found Datasheets File :: 1017    Search Time::1.344ms    
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    DS310208 DS3102GN

Maxim Integrated Products
Maxim Integrated Produc...
Part No. DS310208 DS3102GN
OCR Text ...nputs ( 125mhz) ? four lvds/lvpecl/cmos/ttl inputs ( 156.25mhz) ? three optional frame-sync inputs (cmos/ttl) ? continuous input clock quality monitoring ? numerous input clock frequencies supported: sonet/sdh: 6.48, n x 19....
Description Stratum 3 Timing Card IC with Synchronous Ethernet Support

File Size 1,267.25K  /  141 Page

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    SY89873L0708

Micrel Semiconductor
Part No. SY89873L0708
OCR Text ...nputs: any differential inputs (lvpecl, lvds, cml, hstl) precision differential lvds outputs matched delay: all outputs have matched delay, independent of divider setting ttl/cmos inputs for select and reset/disable two lvds output bank...
Description 3.3V, 2.0GHz ANY DIFF. IN-TO-lvds

File Size 105.11K  /  11 Page

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    Analog Devices, Inc.
Part No. AD9516-3BCPZ
OCR Text ...tchover/holdover modes accepts lvpecl, lvds, or cmos references to 250 mhz programmable delays in path to pfd digital or analog lock detect, selectable 6 pairs of 1.6 ghz lvpecl outputs each output pair shares a 1-to-32 divider with c...
Description 14-Output Clock Generator with Integrated 2.0 GHz VCO 9516 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC64

File Size 1,119.54K  /  80 Page

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    EXAR[Exar Corporation]
Part No. XRT91L82IB XRT91L82
OCR Text ...rs and 16-bit Differential lvds/lvpecl, or Single-Ended lvpecl system interfaces in both receive and transmit directions. The transmit section includes a 16x9 Elastic Buffer (FIFO) to absorb any phase differences between the transmitter clo...
Description 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER

File Size 388.33K  /  59 Page

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    Analog Devices, Inc.
Part No. AD9516-2BCPZ
OCR Text ...tchover/holdover modes accepts lvpecl, lvds, or cmos references to 250 mhz programmable delays in path to pfd digital or analog lock detect, selectable 6 pairs of 1.6 ghz lvpecl outputs each output pair shares a 1-to-32 divider with co...
Description 14-Output Clock Generator with Integrated 2.2 GHz VCO 9516 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC64

File Size 1,088.30K  /  80 Page

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    Analog Devices, Inc.
Part No. AD9516-0BCPZ
OCR Text ...tchover/holdover modes accepts lvpecl, lvds, or cmos references to 250 mhz programmable delays in path to pfd digital or analog lock detect, selectable 6 pairs of 1.6 ghz lvpecl outputs each output pair shares a 1-to-32 divider with c...
Description 14-Output Clock Generator with Integrated 2.8 GHz VCO 9516 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC64

File Size 1,062.62K  /  80 Page

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