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Cypress Semiconductor, Corp.
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| Part No. |
CY2DP3110AI
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| OCR Text |
...or single-ended inputs (clkb) ? hot-swappable/-insertable ? 29 ps typical outp ut-to-output skew ? 95 ps typical part-to-part skew ? 400 ps typical propagation delay ? 0.1 ps typical rms phase jitter ? 1.5 ghz operation (2.7 ghz maximum... |
| Description |
1 of 2:10 Differential Clock/Data Fanout Buffer 2DP SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
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| File Size |
305.22K /
10 Page |
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it Online |
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IDT
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| Part No. |
IDT5T9306NLI8
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| OCR Text |
...operation ? selectable inputs ? hot insertable and over-voltage tolerant inputs ? 3.3v / 2.5v lvttl, hstl, ehstl, lvepecl (2.5v), lvpecl (3.3v), cml, or lvds input interface ? selectable differential inputs to six lvds outputs ? power-down ... |
| Description |
2.5V LVDS 1:16 Clock Buffer TeraBuffer II
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| File Size |
82.91K /
12 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT5T93GL10NLI8
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| OCR Text |
...switching ? selectable inputs ? hot insertable and over-voltage tolerant inputs ? 3.3v / 2.5v lvttl, hstl, ehstl, lvepecl (2.5v), lvpecl (3.3v), cml, or lvds input interface ? selectable differential inputs to ten lvds outputs ? power-down ... |
| Description |
2.5V LVDS 1:10 Glitchless Clock Buffer TeraBuffer II
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| File Size |
111.54K /
15 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT5T93GL16NLI8
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| OCR Text |
...switching ? selectable inputs ? hot insertable and over-voltage tolerant inputs ? 3.3v / 2.5v lvttl, hstl, ehstl, lvepecl (2.5v), lvpecl (3.3v), cml, or lvds input interface ? selectable differential inputs to sixteen lvds outputs ? power-d... |
| Description |
2.5V LVDS 1:16 Glitchless Clock Buffer TeraBuffer II
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| File Size |
116.64K /
15 Page |
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it Online |
Download Datasheet |
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Cypress
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| Part No. |
CY2PP318JI
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| OCR Text |
... ecl/pecl differential inputs ? hot-swappable/-insertable ? 50 ps output-to-output skew ? 150 ps device-to-device skew ? 500 ps propagation delay (typical) ? 1.5 ghz operation (2.2 ghz max. toggle frequency) ? 1.2 ps rms period jitter (ty... |
| Description |
1 of 2:8 Differential Clock/Data Fanout Buffer
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| File Size |
162.77K /
8 Page |
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it Online |
Download Datasheet |
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IDT
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| Part No. |
IDT5T2010 5T2010_DATASHEET
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| OCR Text |
...0MHz HSTL / eHSTL: up to 250MHz Hot insertable and over-voltage tolerant inputs 3-level inputs for selectable interface 3-level inputs for feedback divide selection with multiply ratios of(1-6, 8, 10, 12) Selectable HSTL, eHSTL, 1.8V/2.5V L... |
| Description |
2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK?
From old datasheet system
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| File Size |
154.86K /
23 Page |
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it Online |
Download Datasheet |
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IDT[Integrated Device Technology]
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| Part No. |
IDT5T93GL0 IDT5T93GL06NLI IDT5T93GL06 IDT5T93GL06NLI8
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| OCR Text |
... up to 650MHz Selectable inputs Hot insertable and over-voltage tolerant inputs 3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input interface Selectable differential inputs to six LVDS outputs Power-down mode 2... |
| Description |
2.5V LVDS 1:6 Glitchless Clock Buffer TeraBuffer II
2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER-TM II
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| File Size |
105.00K /
15 Page |
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it Online |
Download Datasheet |
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