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Cypress Semiconductor, Corp.
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Part No. |
CY7C1518JV18-250BZC CY7C1518JV18-300BZXC
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OCR Text |
...istor connected between zq and ground. alternatively, this pin can be connected directly to v ddq , which enables the minimum impedance mo...reference reference voltage input . static input used to set the reference level for hstl inputs, ou... |
Description |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
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File Size |
895.67K /
23 Page |
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